Silicon-Based GaN Power Devices and CMOS Monolithic Heterogeneous Integration with Driver Circuit Co-Optimization

Abstract

To address the bottlenecks of excessive parasitic parameters, performance mismatch, and poor miniaturization in discrete integration of GaN power devices and CMOS drivers, a CMOS-compatible monolithic heterogeneous integration scheme is proposed. The epitaxial structure of GaN-on-Si heterojunction and the integration process flow were optimized, and a co-optimization strategy coupling GaN device structure parameters with CMOS driver circuit timing was developed. Experimental results show that the integrated system achieves a 68% reduction in parasitic inductance, 52% reduction in parasitic capacitance, and a switching speed of 250 V/ns compared with discrete solutions. The power conversion efficiency reaches 97.8% at 1 MHz and maintains above 95% in the load current range of 0.5-10 A. This work provides a feasible technical path for high-performance, miniaturized, and reliable power electronic systems.