Chaya Bhavi, Anuradha M. Sandi, & Prashant Bachanna. (2026). A Pipelined Fixed-Point FPGA Architecture for Binary Antilogarithmic Computation Using Leading-One Detection and BIST. International Journal of Computer Information Systems and Industrial Management Applications, 18(21s), 1703–1721. https://doi.org/10.70917/ijcisim-2026-5920