MAHESH MUDAVATH; BELLAM MOUNIKA APARNA; K. SURESH BABU; MALLIKA LOLLATI. Stage-Aware Approximate Wallace Tree Multiplier for High-Speed and Low-Power VLSI Systems. International Journal of Computer Information Systems and Industrial Management Applications, [S. l.], v. 18, n. 22s, p. 1079–1090, 2026. DOI: 10.70917/ijcisim-2026-5502. Disponível em: https://cspub-ijcisim.org/index.php/ijcisim/article/view/5502. Acesso em: 8 sep. 2026.