Vivek Kumar Kushwah, Ashutosh Kumar Singh, and Kanika Jindal. “Low Power Optimization of Hybrid Logic Full Adder Design Using FinFET Technology for High-Speed Arithmetic Circuits”. International Journal of Computer Information Systems and Industrial Management Applications 18, no. 4s (June 28, 2026): 722–729. Accessed July 1, 2026. https://cspub-ijcisim.org/index.php/ijcisim/article/view/2561.