Mahesh Mudavath, Bellam Mounika Aparna, K. Suresh Babu, and Mallika Lollati. “Stage-Aware Approximate Wallace Tree Multiplier for High-Speed and Low-Power VLSI Systems”. International Journal of Computer Information Systems and Industrial Management Applications 18, no. 22s (September 4, 2026): 1079–1090. Accessed September 7, 2026. https://cspub-ijcisim.org/index.php/ijcisim/article/view/5502.