Chaya Bhavi, Anuradha M. Sandi, and Prashant Bachanna. “A Pipelined Fixed-Point FPGA Architecture for Binary Antilogarithmic Computation Using Leading-One Detection and BIST”. International Journal of Computer Information Systems and Industrial Management Applications 18, no. 21s (August 28, 2026): 1703–1721. Accessed November 6, 2026. https://cspub-ijcisim.org/index.php/ijcisim/article/view/5920.