1.
Karishma Parween, Deeba Ashique, Amol Jagdish Shakadwipi. Pareto-Optimal Power–Delay Co-Optimization of Advanced CMOS Technologies for Next-Generation VLSI Systems Using NSGA-II. IJCISIM [Internet]. 2026 Jul. 21 [cited 2026 Aug. 20];18(9s):1130-44. Available from: https://cspub-ijcisim.org/index.php/ijcisim/article/view/3532