1.
Mahesh Mudavath, Bellam Mounika Aparna, K. Suresh Babu, Mallika Lollati. Stage-Aware Approximate Wallace Tree Multiplier for High-Speed and Low-Power VLSI Systems. IJCISIM [Internet]. 2026 Sep. 4 [cited 2026 Sep. 8];18(22s):1079-90. Available from: https://cspub-ijcisim.org/index.php/ijcisim/article/view/5502