Two Way Concurrent Buffer System without Deadlock in Various Time Models Using Timed Automata

Authors

  • Rohit Mishra Department of Information and Communication Technology, Manipal Institute of Technology, Manipal University
  • Md Zeeshaan Department of Information and Communication Technology, Manipal Institute of Technology, Manipal University
  • Sanjay Singh Department of Information and Communication Technology, Manipal Institute of Technology, Manipal University

Keywords:

Timed Automata, Model Checking, UPPAAL, Real Time Systems, Concurrent Buffer System

Abstract

Two way buffer system is a system that exhibits transfer of data using two buffers concurrently. It includes processes that synchronize to exchange data with each other along with executing certain delays between these synchronizations. In existing Tiny Two Way Buffer System, both generators produce packets in half duplex manner in no time, deterministic time, and non deterministic time. Analysis of the model for above time options leads the model in deadlock. The model can be out of the deadlock if timings in the model is incorporated in alternative fashion. The generators produce packets after a delay of 10 seconds. However, generator one has an initial shift of 5 seconds after which it begins sending a packet every 10 seconds. Hence, initial delay for generator one is 15 seconds and for generator two it is 10 seconds. Due to this initial shift, both generators produce packets alternatively and is deadlock free as the packets do not meet at the same time instant. Moreover, the existing system model is not concurrent and hence takes more time for packet transfer in every iteration. In this paper we have proposed a model of buffer system using an additional dummy buffer for transfer of data packets, we thus checking the model with various time models as no time, deterministic time and non deterministic time. The results of proposed model under above time models are in deadlock. We achieve deadlock free situation by introducing appropriate delay in various buffers of the proposed system, the delay timing is nondeterministic time. The new approach speeds up the transfer of packets, as a result the transfer of data becomes concurrent, deadlock free and hence the model proposed is time efficient. To model and simulate the proposed system we have used UPPAAL as a model checking tool environment for modeling, validation and verification of real-time systems modeled as networks of timed automata. Simulation results shows that the proposed two way buffer system is fully concurrent and time efficient as compared to the existing buffer system.

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Published

2014-01-01

How to Cite

Rohit Mishra, Md Zeeshaan, & Sanjay Singh. (2014). Two Way Concurrent Buffer System without Deadlock in Various Time Models Using Timed Automata. International Journal of Computer Information Systems and Industrial Management Applications, 6, 11. Retrieved from https://cspub-ijcisim.org/index.php/ijcisim/article/view/235

Issue

Section

Original Articles