Investigation of FPGA based 32-bit RISC-Modulation Processor

Abstract

This paper presents the design of a novel RISC-Modulation Processor using the Field Programmable Gate Array. Until now, the RISC processor is designed with operations like arithmetic and logical; shifting; rotating and comparing along with the instruction pipeline, which is the heart of RISC processor. Conventionally, the modulation techniques are developed separately as per the requirement. In this work, the RISC processor design is facilitated with the modulation techniques like pulse width modulation, pulse code modulation, pulse position modulation, quadrature amplitude modulation, sine wave generation and cosine wave generation so as to satisfy both computer and communication manipulations. The real time validation is performed by the implementation of the RISC-Modulation Processor using the Xilinx Spartan FPGA family devices. The power consumption and timing performance of the RMP design are evaluated for the proposed method and compared with different FPGA implementations.